added public API interface and step shell checks for following implementations

src/cpu.rs

@@ -92,8 +92,35 @@ impl Cpu {
         self.read(bus, 0x0100 + self.sp as u16)
     }
 
+    // public API for other hardware
+    pub fn set_nmi(&mut self) { self.nmi_pending = true; }
+    pub fn set_irq(&mut self) { self.irq_pending = true; }
+
+    // shared interrumpt function
+    fn interrupt(&mut self, bus: &mut impl Bus, vector: u16) -> u8 {
+        self.push(bus, (self.pc >> 8) as u8);
+        self.push(bus, (self.pc & 0xFF) as u8);
+        self.push(bus, self.p);          // B clear (unlike BRK)
+        self.set_flag(FLAG_INTERRUPT);
+        self.pc = self.read16(bus, vector);
+        7
+    }
+
     // Step shell
     pub fn step(&mut self, bus: &mut impl Bus) -> u8 {
+        if self.nmi_pending {
+            self.nmi_pending = false;
+            let cycles = self.interrupt(bus, 0xFFFA);
+            self.cycles += cycles as u64;
+            return cycles;
+        }
+        if self.irq_pending && !self.flag(FLAG_INTERRUPT) {
+            self.irq_pending = false;
+            let cycles = self.interrupt(bus, 0xFFFE);
+            self.cycles += cycles as u64;
+            return cycles;
+        }
+
         let opcode: u8 = self.fetch(bus);
         let cycles = match opcode {
             // Jumps & subroutines