LDA instructions implemented

src/cpu.rs

@@ -123,6 +123,14 @@ impl Cpu {
             0xD8 => self.cld_imp(bus),
             0x78 => self.sei_imp(bus),
             0xF8 => self.sed_imp(bus),
+            0xA9 => self.lda_imm(bus),
+            0xA5 => self.lda_zp(bus),
+            0xB5 => self.lda_zpx(bus),
+            0xAD => self.lda_abs(bus),
+            0xBD => self.lda_abx(bus),
+            0xB9 => self.lda_aby(bus),
+            0xA1 => self.lda_izx(bus),
+            0xB1 => self.lda_izy(bus),
             _ => panic!("illegal/unkown opcode {opcode:#04X} at {:#06X}", self.pc.wrapping_sub(1)),
         };
         self.cycles += cycles as u64;
@@ -220,6 +228,20 @@ impl Cpu {
         cycles
     }
 
+    // shared cores for LDx instructions
+    fn lda(&mut self,bus: &mut impl Bus, (address, extra): (u16, u8), base: u8) -> u8 {
+        self.a = self.read(bus, address);
+        self.set_zp_flags(self.a);
+        base + extra
+    }
+
+    // 0xA9, LDA immediate instructions: operand is inline, fetch consumes it, no address helper
+    fn lda_imm(&mut self, bus: &mut impl Bus) -> u8 {
+        self.a = self.fetch(bus);
+        self.set_zp_flags(self.a);
+        2
+    } 
+
     // NES 6502 opcode -> functions
     fn jmp_abs(&mut self, bus: &mut impl Bus) -> u8 { // 0x4C, 3 bytes, 3 cycles
         self.pc = self.fetch16(bus);
@@ -333,6 +355,36 @@ impl Cpu {
         2
     }
 
+    // LDA alternatives here
+    fn lda_zp(&mut self, bus: &mut impl Bus) -> u8 { // 0xA5, 2 bytes
+        let (address, extra) = self.address_zp(bus);
+        self.lda(bus, (address, extra), 3)
+    }
+    fn lda_zpx(&mut self, bus: &mut impl Bus) -> u8 { // 0xB5, 2 bytes
+        let (address, extra) = self.address_zpx(bus);
+        self.lda(bus, (address, extra), 4)
+    }
+    fn lda_abs(&mut self, bus: &mut impl Bus) -> u8 { // 0xAD, 3 bytes
+        let (address, extra) = self.address_abs(bus);
+        self.lda(bus, (address, extra), 4) 
+    }
+    fn lda_abx(&mut self, bus: &mut impl Bus) -> u8 { // 0xBD, 3 bytes
+        let (address, extra) = self.address_abx(bus);
+        self.lda(bus, (address, extra), 4) 
+    }
+    fn lda_aby(&mut self, bus: &mut impl Bus) -> u8 { // 0xB9, 3 bytes
+        let (address, extra) = self.address_aby(bus);
+        self.lda(bus, (address, extra), 4)  
+    }
+    fn lda_izx(&mut self, bus: &mut impl Bus) -> u8 { // 0xA1, 2 bytes
+        let (address, extra) = self.address_izx(bus);
+        self.lda(bus, (address, extra), 6)  
+    }
+    fn lda_izy(&mut self, bus: &mut impl Bus) -> u8 { // 0xB1, 2 bytes
+        let (address, extra) = self.address_izy(bus);
+        self.lda(bus, (address, extra), 5)  
+    }
+
     // all branching alternatives here all 1 bytes
     fn bcs_rel(&mut self, bus: &mut impl Bus) -> u8 { self.branch(bus, self.flag(FLAG_CARRY)) } // 0xB0
     fn bcc_rel(&mut self, bus: &mut impl Bus) -> u8 { self.branch(bus, !self.flag(FLAG_CARRY)) } // 0x90
@@ -373,6 +425,14 @@ impl Cpu {
             0xD8 => 1, // CLD imp
             0x78 => 1, // SEI imp
             0xF8 => 1, // SED imp
+            0xA9 => 2, // LDA imm
+            0xA5 => 2, // LDA zp
+            0xB5 => 2, // LDA zpx
+            0xAD => 3, // LDA abs
+            0xBD => 3, // LDA abx
+            0xB9 => 3, // LDA aby
+            0xA1 => 2, // LDA izx
+            0xB1 => 2, // LDA izy
             _ => 1, // fallback, would show the invalid/unknown opcode only not its parameters
         }
     }